Thanks to the so-called Coreboot patch for Linux, we get to know the power side of the next generation mobile processors Alder Lake. Although Intel reduces the number of large cores compared to previous generations in many models (and replaces larger cores with smaller, more energy-efficient atoms), the limits of PL2 do not change for the better. Remember this while using the 14nm derivative structure Skylake Intel had no problem getting the big 15 cores in the 15W TDP, with the 10nm generation Ice lake It was already 4 large cores, with a 10nm generation Tiger lake With 4 large cores, Intel changed the default TDP from 15 to 28 watts and in the 15W 10nm Alder Lake generation models, only two large cores are expected, complemented by 4-8 small outputs (Atoms):
However, the PL2 limit does not decrease, that is, consumption during reinforcement. The Linux patches showed the following:
- Alder Lake-U has a 15W design with a PL2 limit of 55W
- 28W Alder Lake-U has a PL2 limit of 64W
- Alder Lake-H has a 45W design with a PL2 limit of 115W
For comparison: current 15W Tiger lake PL2 has a limit of 54W, 28W according to 54-64W laptop design and 45W 107W model (for 65W TDP the value is 135W, but mobile phone Alder Lake With a TDP above 45W we don’t know yet about PL2 – but these models are striped, see last column of slide above). Thus the limits of PL2 will increase by 1-8 watts between generations, while the numbers of large cores will decrease by 2 (both generations by 4). 4-8 atoms will be added instead.
In the mobile sector, Intel appears to be emphasizing more on the strategy of achieving single-core performance on one of the fewest large cores and high multi-core performance by involving more atoms. This will work well in standards that generate load on only one core (thread) and all cores (threads), or in applications that behave similarly. In cases where all the pregnancy is concentrated in only 3 strings, this will not happen Alder Lake Yu With two large nuclei and eight small nuclei to use optimally – two fibers will be turned on and full, the third half (the atom) and the remaining seven atoms will remain unused. In contrast, u Tiger lake With four large cores, the three fibers run completely over the large cores.
Of course, more such clusters could occur (this was just one of a number of possible examples) and it would be a reasonable compromise (which would preserve a collection of large / small cores while rapidly reducing the number of CPU failures) either more. Balanced large / small cores (for example 4 + 4 instead of 2 + 8) or smaller power difference between large and small cores. But that’s another topic.
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